Partitioning plays an increasingly important role in the design process of VLSI circuits and systems. It is a technique to divide a circuit or system into a collection of smaller parts. The main reason that partitioning has become a central and sometimes critical design task today is the enormous increase of system complexity and further advances of microelectronic system design and fabrication. For minimizing the testing time and to reduce test vectors for pseudo-exhaustive testing I-PIFAN algorithm is used. Finally the reliability of partitioned circuit is found using Probabilistic gate models. For error tolerance effective reliability for the circuit is calculated. It is found that if effective reliability is used there is a greater improvement in large benchmarks.