Items where Author is "Badrinarayanan, S."

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Mathana, J. Magdalene and Badrinarayanan, S. and Rani Hemamalini, R. (2014) VLSI Architecture for High Performance 3GPP Interleaver/Deinterleaver for Turbo Codes. International Journal of Computers Communications & Control, 9 (2). p. 187. ISSN 1841-9836

Mathana, J. Magdalene and Badrinarayanan, S. and Hemamalini, R. Rani (2014) VLSI Architecture for High Performance 3GPP (De)Interleaver for Turbo Codes. INTERNATIONAL JOURNAL OF COMPUTERS COMMUNICATIONS & CONTROL, 9.0 (2). pp. 187-200. ISSN 1841-9836

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